For the past several decades, the scaling of features in integrated circuits has been a driving force behind an ever-growing semiconductor industry. Scaling to smaller features enables increased densities of functional units on the limited real estate of semiconductor chips. As semiconductor devices have become highly integrated, a MIM capacitor having a higher capacitance per unit of chip area is required. The MIM capacitor is widely used for applications such as an analog to digital (AD) converter, a RF device, a switching capacitor filter, and a CMOS image sensor (CIS). To meet the requirements of high integration, an integrated circuit of a semiconductor device has been proposed with a stacked MIM capacitor, which has a high capacitance per unit of chip area.
In integrated circuit of the semiconductor device, thin film resistors (TFRs) are attractive components for high precision analog and mixed signal applications, and have been utilized in electronic circuits of many important technological applications. Special cares are required as integrating the TFRs into existing process flows of an integrated circuit. Generally, in fabricating a TFR in an integrated circuit, materials of the TFR are evaporated or sputtered onto a substrate and subsequently patterned and etched. As such, the TFR is embedded between the inter-metal dielectric (IMD) layers. The TFR needs an electrical connection. Therefore, two extra mask layers are required to form the TFR itself and to form the contact points of the TFR.
As the semiconductor devices being required to perform multiple functions and become highly integrated, the stacked MIM capacitor and the TFR are often integrated in one integrated circuit of the semiconductor devices. However, as aforementioned, two extra mask layers are required in fabricating the TFR in the integrated circuit. Therefore, the cost of fabrication of an integrated circuit with both of the stacked MIM capacitor and the TFR is increased by additional masks for the TFR. Besides, process margin and the reliability of the integrated circuit produced are also limited by multiple deposition and dry/wet etch steps which are required to incorporate the TFR into the integrated circuit. Accordingly, improvements in structures and methods of forming the integrated circuit with both of the stacked MIM capacitor and the TFR continue to be sought.